Cross-sectional schematic of (a) a standard vertical D-MOSFET and (b) a
The latch-up path between adjacent lateral HV-to-LV circuit blocks with
Latch-Up Problem in CMOS – VLSI Design – Buzztech
Analog IC co-design for latch-up compliance - EDN
Process Integration
Examples of Optoelectronic Integrated Circuits
E-HandBook On High Voltage Circuit Breakers, Edition 1.0, September'2021, PDF, Capacitor
Analog IC co-design for latch-up compliance - EDN